TEST PATTERN AND POWER MINIATURIZATION USING FAULT INJECTION METHOD FOR DIAGNOSING SCAN CHAIN FAILURES

Abstract

During the testing of chip, diagnosing chain failure is most important. Multiple faults inthe scan chain can be diagnosed using the selective triggering method for the reduction of transitions in the scan cell. This triggering technique reduces switching activity in the circuitunder test and increases the clock frequency of the scanning process. A reordering is utilized inthis system to avoid the large number of transitions. By the process of reordering area mayincrease and the number of test patterns used for testing also increased. Reduce the test patterncount and area by adding fault injection technique in the system. Once the fault type is identified the subsequent fault injection process can be more realistic and thus lead to test pattern reduction at the result. This reduces the power and area than the preceding method.